Resumen
We present an FPGA-based approach for estimating the delayed synaptic weights of spiking neural networks. Our approach makes explicit use of the fact that reverse engineering of a spiking neural network can be cast as a linear programming problem, whereby the objective function is based on the network spiking activity. The solution is obtained by employing the widely used simplex algorithm. Numerical results on a Xilinx Spartan 3 FPGA board show that the present approach can be used to reproduce a desired output from the observed network spiking activity.
Idioma original | Inglés |
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Páginas | 2897-2900 |
Número de páginas | 4 |
DOI | |
Estado | Publicada - 2012 |
Publicado de forma externa | Sí |
Evento | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, República de Corea Duración: 20 may 2012 → 23 may 2012 |
Conferencia
Conferencia | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 |
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País/Territorio | República de Corea |
Ciudad | Seoul |
Período | 20/05/12 → 23/05/12 |