A design environment with simulation and formal verification (SYR-PADDE)

Miquel Bertran; Felipe Alverez-Cuevas; Joan Viaplana; Albert Duran; Miquel Porta; Bartomeu Palmer; Joan Ramió; Daniel Cabedo; Antoni Garrell; Josep M. Garrell; Francese Escudero; Miquel Nicolau; Francese Oller; Jordi Forga; Joan M. Espejo; Josep M. Solanas

doi:10.1109/CAMAD.1994.765636

A design environment with simulation and formal verification (SYR-PADDE)

Miquel Bertran^*
, Felipe Alverez-Cuevas
, Joan Viaplana
, Albert Duran
, Miquel Porta
, Bartomeu Palmer
, Joan Ramió
, Daniel Cabedo
, Antoni Garrell
, Josep M. Garrell
, Francese Escudero
, Miquel Nicolau
, Francese Oller
, Jordi Forga
, Joan M. Espejo
, Josep M. Solanas

^*Corresponding author for this work

Research output: Conference paper › Contribution › peer-review

2 Citations (Scopus)

Abstract

An expreimental CAD environment for distributed systems, and in particular for the telecommunications arena, integrating tools for simulation and for formal verification is outlined. The simulation part (PADDE, from Parallelism and Abstraction in Dimensional Design) is operative and under use. The verification part (SYR, from System Rules) is being developed, both theory, methods, and tools.

Original language	English
DOIs	https://doi.org/10.1109/CAMAD.1994.765636
Publication status	Published - 1994
Event	5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994 - Princeton, United States Duration: 24 Apr 1994 → 27 Apr 1994

Conference

Conference	5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994
Country/Territory	United States
City	Princeton
Period	24/04/94 → 27/04/94

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10.1109/CAMAD.1994.765636

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Bertran, M., Alverez-Cuevas, F., Viaplana, J., Duran, A., Porta, M., Palmer, B., Ramió, J., Cabedo, D., Garrell, A., Garrell, J. M., Escudero, F., Nicolau, M., Oller, F., Forga, J., Espejo, J. M., & Solanas, J. M. (1994). A design environment with simulation and formal verification (SYR-PADDE). Paper presented at 5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994, Princeton, United States. https://doi.org/10.1109/CAMAD.1994.765636

@conference{1c94083f67d2491c81ff974b57b561f9,

title = "A design environment with simulation and formal verification (SYR-PADDE)",

abstract = "An expreimental CAD environment for distributed systems, and in particular for the telecommunications arena, integrating tools for simulation and for formal verification is outlined. The simulation part (PADDE, from Parallelism and Abstraction in Dimensional Design) is operative and under use. The verification part (SYR, from System Rules) is being developed, both theory, methods, and tools.",

author = "Miquel Bertran and Felipe Alverez-Cuevas and Joan Viaplana and Albert Duran and Miquel Porta and Bartomeu Palmer and Joan Rami{\'o} and Daniel Cabedo and Antoni Garrell and Garrell, \{Josep M.\} and Francese Escudero and Miquel Nicolau and Francese Oller and Jordi Forga and Espejo, \{Joan M.\} and Solanas, \{Josep M.\}",

note = "Publisher Copyright: {\textcopyright} 1994 IEEE.; 5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994 ; Conference date: 24-04-1994 Through 27-04-1994",

year = "1994",

doi = "10.1109/CAMAD.1994.765636",

language = "English",

}

Bertran, M, Alverez-Cuevas, F, Viaplana, J, Duran, A, Porta, M, Palmer, B, Ramió, J, Cabedo, D, Garrell, A, Garrell, JM, Escudero, F, Nicolau, M, Oller, F, Forga, J, Espejo, JM & Solanas, JM 1994, 'A design environment with simulation and formal verification (SYR-PADDE)', Paper presented at 5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994, Princeton, United States, 24/04/94 - 27/04/94. https://doi.org/10.1109/CAMAD.1994.765636

A design environment with simulation and formal verification (SYR-PADDE). / Bertran, Miquel; Alverez-Cuevas, Felipe; Viaplana, Joan et al.
1994. Paper presented at 5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994, Princeton, United States.

Research output: Conference paper › Contribution › peer-review

TY - CONF

T1 - A design environment with simulation and formal verification (SYR-PADDE)

AU - Bertran, Miquel

AU - Alverez-Cuevas, Felipe

AU - Viaplana, Joan

AU - Duran, Albert

AU - Porta, Miquel

AU - Palmer, Bartomeu

AU - Ramió, Joan

AU - Cabedo, Daniel

AU - Garrell, Antoni

AU - Garrell, Josep M.

AU - Escudero, Francese

AU - Nicolau, Miquel

AU - Oller, Francese

AU - Forga, Jordi

AU - Espejo, Joan M.

AU - Solanas, Josep M.

PY - 1994

Y1 - 1994

N2 - An expreimental CAD environment for distributed systems, and in particular for the telecommunications arena, integrating tools for simulation and for formal verification is outlined. The simulation part (PADDE, from Parallelism and Abstraction in Dimensional Design) is operative and under use. The verification part (SYR, from System Rules) is being developed, both theory, methods, and tools.

AB - An expreimental CAD environment for distributed systems, and in particular for the telecommunications arena, integrating tools for simulation and for formal verification is outlined. The simulation part (PADDE, from Parallelism and Abstraction in Dimensional Design) is operative and under use. The verification part (SYR, from System Rules) is being developed, both theory, methods, and tools.

UR - https://www.scopus.com/pages/publications/84958829149

U2 - 10.1109/CAMAD.1994.765636

DO - 10.1109/CAMAD.1994.765636

M3 - Contribution

AN - SCOPUS:84958829149

T2 - 5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994

Y2 - 24 April 1994 through 27 April 1994

ER -

A design environment with simulation and formal verification (SYR-PADDE)

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