TY - JOUR
T1 - Low noise front end ASIC with current mode active cooled termination for the upgrade of the LHCb calorimeter
AU - Gascon, D.
AU - Picatoste, E.
AU - Abellan, C.
AU - Duarte, O.
AU - Garrido, Ll
AU - Grauges, E.
AU - Lefrancois, J.
AU - MacHefert, F.
AU - Vilasis-Cardona, X.
N1 - Funding Information:
Manuscript received December 18, 2011; revised February 29, 2012; accepted March 31, 2012. Date of publication October 02, 2012; date of current version October 09, 2012. This work was supported by the Spanish Ministerio de Ciencia e Innovación under grant FPA2008-06271-C02-01/02 and by the Generalitat de Catalunya under grant 2009SGR1268.
PY - 2012
Y1 - 2012
N2 - The current mode line terminating input stage of an integrated circuit for the upgrade of the LHCb calorimeter front end electronics is presented. The circuit is based on a current mode input stage followed by two fully differential interleaved channels, namely a switched integrator and a track and hold. The input stage employs a novel electronically cooled input termination scheme to achieve stringent noise requirements. Compared to previous designs, its novelty relies in the use of two current feedback loops to decrease and control the input impedance of a common base stage. Two prototypes in Austriamicrosystems SiGe BiCMOS 0.35 μm technology have been designed and tested. Key measurements have been performed. Reflection coefficient is smaller than 0.5% for the full dynamic range, which is 12 bits. Relative linearity error is below 1%. Output noise is about 1 LSB after applying correlated double sampling.
AB - The current mode line terminating input stage of an integrated circuit for the upgrade of the LHCb calorimeter front end electronics is presented. The circuit is based on a current mode input stage followed by two fully differential interleaved channels, namely a switched integrator and a track and hold. The input stage employs a novel electronically cooled input termination scheme to achieve stringent noise requirements. Compared to previous designs, its novelty relies in the use of two current feedback loops to decrease and control the input impedance of a common base stage. Two prototypes in Austriamicrosystems SiGe BiCMOS 0.35 μm technology have been designed and tested. Key measurements have been performed. Reflection coefficient is smaller than 0.5% for the full dynamic range, which is 12 bits. Relative linearity error is below 1%. Output noise is about 1 LSB after applying correlated double sampling.
KW - Analog integrated circuits
KW - BiCMOS integrated circuits
KW - current mode circuits
KW - high energy physics instrumentation
KW - low-noise amplifiers
KW - particle measurements
KW - scintillation counters
KW - switched circuits
UR - http://www.scopus.com/inward/record.url?scp=84867522462&partnerID=8YFLogxK
U2 - 10.1109/TNS.2012.2212725
DO - 10.1109/TNS.2012.2212725
M3 - Article
AN - SCOPUS:84867522462
SN - 0018-9499
VL - 59
SP - 2471
EP - 2478
JO - IEEE Transactions on Nuclear Science
JF - IEEE Transactions on Nuclear Science
IS - 5 PART 3
M1 - 6317210
ER -