High-level synthesis of pipelined circuits from modular queue-based specifications

Producció científica: Article en revista indexadaArticleAvaluat per experts

1 Citació (Scopus)


This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modular specification language with an efficient implementation. In our system, the designer specifies the circuit as a set of independent modules connected by conceptually unbounded queues. Our synthesis algorithm automatically transforms this modular, asynchronous specification into a tightly coupled, fully synchronous implementation in synthesizable Verilog.

Idioma originalAnglès
Pàgines (de-a)2655-2664
Nombre de pàgines10
RevistaIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Estat de la publicacióPublicada - de nov. 2001
Publicat externament


Navegar pels temes de recerca de 'High-level synthesis of pipelined circuits from modular queue-based specifications'. Junts formen un fingerprint únic.

Com citar-ho