A design environment with simulation and formal verification (SYR-PADDE)

Miquel Bertran, Felipe Alverez-Cuevas, Joan Viaplana, Albert Duran, Miquel Porta, Bartomeu Palmer, Joan Ramió, Daniel Cabedo, Antoni Garrell, Josep M. Garrell, Francese Escudero, Miquel Nicolau, Francese Oller, Jordi Forga, Joan M. Espejo, Josep M. Solanas

    Producció científica: Contribució a una conferènciaContribucióAvaluat per experts

    2 Cites (Scopus)

    Resum

    An expreimental CAD environment for distributed systems, and in particular for the telecommunications arena, integrating tools for simulation and for formal verification is outlined. The simulation part (PADDE, from Parallelism and Abstraction in Dimensional Design) is operative and under use. The verification part (SYR, from System Rules) is being developed, both theory, methods, and tools.

    Idioma originalAnglès
    DOIs
    Estat de la publicacióPublicada - 1994
    Esdeveniment5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994 - Princeton, United States
    Durada: 24 d’abr. 199427 d’abr. 1994

    Conferència

    Conferència5th IEEE International Workshop on Computer-Aided Modeling, Analysis, and Design of Communication Links and Networks, CAMAD 1994
    País/TerritoriUnited States
    CiutatPrinceton
    Període24/04/9427/04/94

    Fingerprint

    Navegar pels temes de recerca de 'A design environment with simulation and formal verification (SYR-PADDE)'. Junts formen un fingerprint únic.

    Com citar-ho